Uyemura Jhon P <br/><br/>
Chip Design For Submicron VLSI: CMOS Layout And Simulation 
Uyemura Jhon P 
 - INDIAN ED 
 -  THOMSON PUB  2007 
<br/><br/><label>ISBN: </label> INR 350.00 
<br/><br/><label>Standard No.: </label>13699  [Excel file from AVIT] 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Electronics
<br/><br/><label>Subjects--Index Terms: </label>chip design