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VERILOG HDL: GUIDE TO DIGITAL DESIGN AND SYNTHESIS (Record no. 60274)

MARC details
000 -LEADER
fixed length control field 00552nam a2200205Ia 4500
003 - CONTROL NUMBER IDENTIFIER
control field AVIT
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20211120081107.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 090818s2006 ||||||||||||||||| ||und|d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
Printed Price INR 350.00
100 ## - FIRST AUTHOR (IF A PERSON)
Name of author Palnitkar Samir
115.187.37.79 Author
245 #0 - TITLE STATEMENT
Title VERILOG HDL: GUIDE TO DIGITAL DESIGN AND SYNTHESIS
Statement of responsibility Palnitkar Samir
250 ## - EDITION STATEMENT
Edition statement 2ND ED
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Name of publisher PEARSON EDUCATION
Date of publication, distribution, etc. 2006
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Subject heading Electronics
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme
Koha item type Books
653 ## - INDEX TERM--UNCONTROLLED
-- digital design
Holdings
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan (e.g. reference copy) Home library Current library Date acquired Source of acquisition Purchase price (after disc. etc) Total Checkouts Accession No Date last seen Price effective from Koha item type
          AVIT Central Library AVIT Central Library 18/08/2009 Bs@ds 350.00   22229 20/11/2021 20/11/2021 Books