opac header image

VERILOG HDL: GUIDE TO DIGITAL DESIGN AND SYNTHESIS (Record no. 60262)

MARC details
000 -LEADER
fixed length control field 00597nam a2200217Ia 4500
003 - CONTROL NUMBER IDENTIFIER
control field AVIT
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20211120081106.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 190527s2012 ||||||||||||||||| ||und|d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
Printed Price INR 325.00
100 ## - FIRST AUTHOR (IF A PERSON)
Name of author SAMIR PALNITKAR
115.187.37.79 Author
245 #0 - TITLE STATEMENT
Title VERILOG HDL: GUIDE TO DIGITAL DESIGN AND SYNTHESIS
Statement of responsibility SAMIR PALNITKAR
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Name of publisher PEARSON EDUCATION
300 ## - PHYSICAL DESCRIPTION
Accompanying material includes cd
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Subject heading Electronics
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme
Koha item type Books
653 ## - INDEX TERM--UNCONTROLLED
-- GUIDE TO DIGITAL DESIGN AND SYNTHESIS
653 ## - INDEX TERM--UNCONTROLLED
-- Others
Holdings
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan (e.g. reference copy) Home library Current library Date acquired Purchase price (after disc. etc) Total Checkouts Accession No Date last seen Price effective from Koha item type Source of acquisition Total Renewals Date last checked out
          AVIT Central Library AVIT Central Library 02/05/2002 325.00   7398 20/11/2021 20/11/2021 Books      
          AVIT Central Library AVIT Central Library 02/05/2002 325.00   7399 20/11/2021 20/11/2021 Books      
          AVIT Central Library AVIT Central Library 18/08/2009 350.00 4 22212 17/05/2022 20/11/2021 Books Bs@ds   13/05/2022